LTT's deep-dive frames the Ryzen AI Max+ 395 mini-PC as a category-defining machine because its 96GB of GPU-visible unified memory lets developers run 70B-class models at usable speeds (~11 tok/s on Llama 3.3 70B) in a 1.6L box under 140W. They argue the maturity of ROCm 6.3 plus working llama.cpp/vLLM/Ollama support means x86 developers finally have a Mac Studio alternative without leaving CUDA-adjacent tooling behind.
The submitter's framing — and the 300-point top thread it generated — centers on the fact that someone finally shipped an x86 unified-memory box that competes with Apple's M-series pitch. The excitement is less about raw benchmarks and more about breaking the two-year deadlock where local 70B inference required either used A6000s, dual 3090s, or a Mac.
The editorial emphasizes that 96GB of GPU-addressable memory in a sub-$4k desktop is the real story — more than any consumer card and only bettered by H100/MI300X-class hardware. It notes that Nvidia's consumer stack tops out at 32GB on the RTX 5090, which cannot hold a 70B model at any usable quantization, making capacity (not tokens/sec) the binding constraint for local LLM work.
The synthesis lays out the competitive landscape — used A6000 at ~$4k, dual 3090s, or a $4,800 Mac Studio — and implicitly positions the Halo box as landing in the same price tier rather than undercutting it. The value proposition is convenience and form factor (1.6L, <140W, x86, ROCm) rather than a cost breakthrough, which sets up a real debate about whether the ecosystem lock-in of each alternative outweighs the hardware parity.
LTT Labs published a deep-dive on AMD's Ryzen AI Max+ 395 — codename Strix Halo, marketed as Ryzen AI Halo — the chip powering a new class of small-form-factor workstations aimed squarely at local LLM developers. The reference design LTT tested is a ~1.6L mini-PC with a 16-core Zen 5 CPU, a 40-CU RDNA 3.5 iGPU branded Radeon 8060S, and up to 128GB of unified LPDDR5X-8000 on a 256-bit bus. Street price for the top SKU lands around $4,000.
The headline number for developers is the memory split. AMD's driver exposes up to 96GB of the unified pool as GPU-visible VRAM, with the remainder reserved for the OS and CPU workloads. That is more addressable GPU memory than anything short of an H100 80GB, an MI300X, or a stack of RTX 6000 Adas — in a box that fits under a monitor and draws under 140W at the wall. LTT ran Llama 3.3 70B in 4-bit at roughly 11 tokens/sec, Qwen 2.5 72B at similar throughput, and had headroom left over to run a 32B model alongside a vision encoder for agent-style workflows.
The silicon itself is not new — Strix Halo shipped in the first half of 2025 in a handful of premium laptops from Asus and HP. What's new is the desktop-class reference platform, mature ROCm 6.3 support for the 8060S, and the fact that llama.cpp, vLLM, and Ollama now all run on it without heroics. HN's top comment thread (300+ points at the time of writing) was less about the benchmarks and more about the fact that someone finally shipped an x86 answer to Apple's M-series unified memory pitch.
For two years the local-LLM story on x86 has been ugly. If you wanted to run a 70B model at usable quantization, your options were a used A6000 (48GB, ~$4k), a pair of 3090s wired together with NVLink (48GB combined, thermally miserable), or a Mac Studio with 128GB unified memory (~$4,800, but you're on MLX and Metal). Nvidia's consumer stack tops out at 32GB on the RTX 5090, which is not enough for a 70B model at any quantization worth running. The gap between "laptop that can run a 7B" and "workstation that can run a 70B" was a $10k+ cliff.
Strix Halo collapses that cliff. At $4k for the 128GB SKU, you get 96GB of usable VRAM, which is enough for Llama 3.3 70B at Q6, Qwen 2.5 72B at Q5, or DeepSeek V2 Lite at full FP16 with a generous context window. It is also enough to hold a 70B model and a 7B draft model in memory for speculative decoding, which is the trick that gets throughput on unified-memory systems into the range where interactive coding assistants stop feeling laggy.
The honest counterpoint is bandwidth. LPDDR5X-8000 on a 256-bit bus gives you 256GB/s of memory bandwidth — roughly a quarter of an RTX 4090's 1008GB/s and an eighth of an H100's 3.35TB/s. Token generation on decoder-only transformers is memory-bandwidth-bound, so the 8060S will never match a discrete GPU on throughput per parameter. LTT measured Llama 3.3 70B at ~11 tok/s on Halo versus ~28 tok/s on a single H100 running the same quant. If your workload is "answer one question fast," a rented H100 hour still wins. If your workload is "iterate on prompts and tool schemas against a real 70B model at my desk, offline, without a cloud bill," Halo is the first x86 machine that makes that a reasonable ask.
The ROCm story also matters more than the benchmarks. AMD has burned goodwill for years shipping GPUs where the drivers only really worked on data-center parts. ROCm 6.3 supports the 8060S as a first-class target, and the LTT team reports that llama.cpp, vLLM, PyTorch nightly, and Ollama all installed without patches. That is a genuinely new experience for anyone who tried to get an RX 7900 XTX working with PyTorch in 2024.
If you are building agent frameworks, evaluation harnesses, or coding assistants that need to hit a local model on every keystroke, Halo is the first hardware where development and production can plausibly use the same model class. Running Llama 3.3 70B locally at 11 tok/s is slow enough that you would never serve it to users, but fast enough that you can meaningfully test tool-calling, structured output, and multi-turn behavior without racking up Anthropic or OpenAI bills during iteration. The economic argument is simple: at $4k up front, Halo pays for itself against a $2/hour on-demand H80 in about 2,000 hours of active development, which is roughly one senior engineer for a year.
For teams doing fine-tuning, Halo is less compelling. 96GB of VRAM at 256GB/s is enough for LoRA fine-tunes of 13B models and QLoRA fine-tunes of 70B models, but full fine-tunes of anything above 7B will page constantly. If your loop is "train, evaluate, ship," you still want a rented H100 for the train step. Halo is a serving and evaluation machine, not a training rig.
The other realistic use case is on-device agents that handle sensitive data — medical records, legal documents, internal codebases that can't leave the network. A $4k box that runs a 70B model with a 32k context window, sitting on a desk in a locked office, is a materially different compliance story than "we send it to Anthropic and trust the DPA." Expect procurement teams to start asking about this by Q4.
AMD has already telegraphed a Strix Halo refresh on Zen 6 for late 2026, with LPDDR6 rumored to push bandwidth past 400GB/s. If they hit that number, the throughput gap versus discrete GPUs shrinks from 4x to under 2.5x, and the argument for a local dev box gets harder to refuse. Nvidia's response — a rumored DGX Spark consumer variant with GB10 silicon — is still vapor. For the next twelve months, if you want 96GB of usable VRAM on your desk without selling a kidney, this is the box.
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